1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory device which stores multivalue data, for example, and more particularly to a nonvolatile semiconductor memory device using a current comparison type sense amplifier.
2. Description of the Related Art
For example, various types of nonvolatile semiconductor memory devices (which are hereinafter referred to as flash memories) which are configured by EEROM cells and in which data can be electrically and simultaneously erased are developed. For example, the readout and verify operations of a NOR type flash memory are performed by comparing currents flowing in a selected memory cell and a reference memory cell by use of a sense amplifier (for example, refer to Jpn. Pat. Appln. KOKAI Publication No. 2001-325795, B. Pathak et al., A 1.8V 64 Mb 100 MHz Flexible Read While Write Flash Memory, 2001, IEEE international Solid-State Circuits Conference). This type is called a current comparison type sense system.
In the case of the current comparison type sense system, voltage applied to the control gate of a memory cell is changed at the verify time in which the threshold voltage of the memory cell having data written therein is verified and at the readout time in which data is read out from the memory cell. A system in which the threshold voltage is thus verified by use of voltage different from the voltage used at the readout time is hereinafter called a voltage verify system.
In a case where the verify operation is performed by use of the above voltage verify system when binary data of “0” or “1” is stored in the memory cell, a current margin (which is hereinafter referred to as a sense current margin) with respect to the reference current at the data readout time can be made sufficiently large even if the current-voltage characteristic (which is hereinafter referred to as Gm) of the memory cell varies.
However, when multivalue data such as “00”, “01”, “10”, “11” is stored in the memory cell, for example, a sufficient large sense current margin cannot be attained because of a variation in Gm of the memory cell at the verify time according to the voltage verify system. Therefore, it becomes difficult to stably verify the threshold voltage of the memory cell and becomes impossible to control the threshold voltage of the memory cell with high precision. Accordingly, it is desired to develop a nonvolatile semiconductor memory device in which a sufficiently large current margin at the readout time can be attained and the threshold voltage of the memory cell can be controlled with high precision.